Requisition # F016
Job Title  FPGA Verification Engineer
Post Date 2016-02-01
Job Type: Full-time
Job Area Engineering – Hardware
Location California – San Diego
Summary Translation of an existing Verilog design to FPGA fabrics, including timing closure/design modification/simulation/verification of the translation
Responsibilities The individual we are seeking will possess these attributes:

  • The ability to implement a high speed wireless communication SoC on FPGA platform for presilicon emulation/verification
  • FPGA RTL design with Verilog HDL, mapping/PAR/timing closure with Synplify_pro/ISE
  • FPGA development flow creation and documentation based on ASIC design
  • Onboard debugging with HW/SW team
Skills/Experience
  • Hands-on experience in the complete FPGA design flow for either Xilinx or Altera FPGAs
  • Proficiency with RTL design modification, logic simulation and implementation tools for large complex designs.
  • Good understanding of FPGA timing and FPGA architecture/clock system
  • Familiarity with common lab equipment and tools
  • Good verbal and written communication skills and communicates well across functional groups
Education Requirements
  • BSEE required / MSEE preferred

How to apply:

Please email resume to jobs@tensorcom.com.
Refer to job title and requisition number listed above.