|Job Title||FPGA Verification Engineer|
|Job Area||Engineering – Hardware|
|Location||California – San Diego|
|Summary||Translation of an existing Verilog design to FPGA fabrics, including timing closure/design modification/simulation/verification of the translation|
|Responsibilities||The individual we are seeking will possess these attributes:
How to apply:
Please email resume to email@example.com.
Refer to job title and requisition number listed above.